Min/Max Heap Accelerator
For our final project in ECE 475, Ian Henriques and I built a hardware accelerator for min/max heap operations, which are commonly used in priority queues and graph algorithms. Provides linear time sort and IPC=1 for sequential insert and remove operations.
Unforunately, the RTL cannot be made public as it is tightly integrated with solutions to a project for ECE 475 at Princeton.